Freescale Semiconductor /MKL28T7_CORE1 /XRDC /MDA_W1_1

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Interpret as MDA_W1_1

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0DID0 (00)DIDS 0 (00)PE0PIDM0PID0LPID0 (LPE)LPE 0 (DFMT)DFMT 0 (0)LK1 0 (0)VLD

PE=00, DIDS=00, VLD=0, LK1=0

Description

Master Domain Assignment Wm,n (DFMT=0)

Fields

DID

Domain identifier

DIDS

DID Select

0 (00): Use MDAn[3:0] as the domain identifier.

1 (01): Use the input DID as the domain identifier.

2 (10): Use MDAn[3:2] concatenated with the low-order 2 bits of the input DID (DID_in[1:0]) as the domain identifier.

PE

Process identifier enable

0 (00): No process identifier is included in the domain hit evaluation.

1 (01): No process identifier is included in the domain hit evaluation.

2 (10): The process identifier is included in the domain hit evaluation as defined by the expression: partial_domain_hit = (PE == 2) && ((PID & ~PIDM) == (XRDC_PIDn[PID] & ~PIDM))

3 (11): The process identifier is included in the domain hit evaluation as defined by the expression: partial_domain_hit = (PE == 3) && ((PID & ~PIDM) == (XRDC_PIDn[PID] & ~PIDM))

PIDM

Process Identifier Mask

PID

Process Identifier

LPID

Logical partition Identifier

LPE

Logical partition enable

DFMT

Domain format

LK1

1-bit Lock

0 (0): Register can be written by any secure privileged write.

1 (1): Register is locked (read-only) until the next reset.

VLD

Valid

0 (0): The Wm domain assignment is invalid.

1 (1): The Wm domain assignment is valid.

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